diff options
| author | Grant Likely <grant.likely@secretlab.ca> | 2008-05-01 11:05:58 -0600 |
|---|---|---|
| committer | Grant Likely <grant.likely@secretlab.ca> | 2008-05-01 11:05:58 -0600 |
| commit | 80791be11145f7dd7f68c84741fc66e5164b7353 (patch) | |
| tree | 9794b484b7a92896aade75517d60dc60d00e86ba /Documentation/powerpc/mpc52xx-device-tree-bindings.txt | |
| parent | eabd90944b3a00766e84da3d117ea0f3e0a3b1a3 (diff) | |
[POWERPC] mpc5200: Allow for fixed speed MII configurations
Various improvements for configuring the MPC5200 MII link from the
device tree:
* Look for 'current-speed' property for fixed speed MII links
* Look for 'fsl,7-wire-mode' property for boards using the 7 wire mode
* move definition of private data structure out of the header file
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Wolfgang Grandegger <wg@grandegger.com>
Diffstat (limited to 'Documentation/powerpc/mpc52xx-device-tree-bindings.txt')
| -rw-r--r-- | Documentation/powerpc/mpc52xx-device-tree-bindings.txt | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt index cda7a7dffa6..6f12f1c79c0 100644 --- a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt +++ b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt @@ -237,6 +237,17 @@ Each GPIO controller node should have the empty property gpio-controller and according to the bit numbers in the GPIO control registers. The second cell is for flags which is currently unsused. +8) FEC nodes +The FEC node can specify one of the following properties to configure +the MII link: +"fsl,7-wire-mode" - An empty property that specifies the link uses 7-wire + mode instead of MII +"current-speed" - Specifies that the MII should be configured for a fixed + speed. This property should contain two cells. The + first cell specifies the speed in Mbps and the second + should be '0' for half duplex and '1' for full duplex +"phy-handle" - Contains a phandle to an Ethernet PHY. + IV - Extra Notes ================ |