diff options
| author | Tushar Behera <tushar.b@samsung.com> | 2014-07-08 08:31:41 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-07-08 08:31:41 +0900 |
| commit | be0b420ad6123e587738a67a9eff3ec213a57604 (patch) | |
| tree | cfd40f05975ad63412e3836d91e3193ac2f4b6fb /Documentation | |
| parent | cd3de83f147601356395b57a8673e9c5ff1e59d1 (diff) | |
ARM: dts: Update the parent for Audss clocks in Exynos5420
Currently CLK_FOUT_EPLL was set as one of the parents of AUDSS mux.
As per the user manual, it should be CLK_MAU_EPLL.
The problem surfaced when the bootloader in Peach-pit board set
the EPLL clock as the parent of AUDSS mux. While booting the kernel,
we used to get a system hang during late boot if CLK_MAU_EPLL was
disabled.
Signed-off-by: Tushar Behera <tushar.b@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Reported-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions