diff options
| author | Huaxu Wan <huaxu.wan@linux.intel.com> | 2009-09-23 22:59:43 +0200 |
|---|---|---|
| committer | Jean Delvare <khali@linux-fr.org> | 2009-09-23 22:59:43 +0200 |
| commit | fa08acd7d16cd7ea8114f3844b0ef2505a4276a8 (patch) | |
| tree | 2c02bd54c52c8a7c0354965af194882f8b9252f9 /Documentation | |
| parent | eccfed42215bebda0acc3158c1a4ff8325dea275 (diff) | |
hwmon: (coretemp) Add Lynnfield CPU
Add Lynnfield processor support. Lynnfield is a quad-core Nehalem
based microprocessor for Desktop market, which is introduced in
September 2009.
Signed-off-by: Huaxu Wan <huaxu.wan@linux.intel.com>
Signed-off-by: Kent Liu <kent.liu@linux.intel.com>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/hwmon/coretemp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/hwmon/coretemp b/Documentation/hwmon/coretemp index 65d1e667c36..92267b62db5 100644 --- a/Documentation/hwmon/coretemp +++ b/Documentation/hwmon/coretemp @@ -6,7 +6,7 @@ Supported chips: Prefix: 'coretemp' CPUID: family 0x6, models 0xe (Pentium M DC), 0xf (Core 2 DC 65nm), 0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm), - 0x1a (Nehalem), 0x1c (Atom). + 0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield) Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide http://softwarecommunity.intel.com/Wiki/Mobility/720.htm |