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authorOlof Johansson <olof@lixom.net>2012-09-16 17:57:00 -0700
committerOlof Johansson <olof@lixom.net>2012-09-16 18:03:50 -0700
commit591346c9d172daeba44ae8cbe2f9dcb7aa266811 (patch)
treea5d6977f19116bd11f2fa869d071226c8cd50cd0 /Documentation
parentbada1c5b49e4a66014f919b4bd95fca9dd3d04bd (diff)
parent0607fa5884f1759b396a0e1c07be561515daddc8 (diff)
Merge tag 'msm-dt-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/dt
From David Brown: These patches migrate both the 8660 and 8960 targets on msm to be devicetree only. This also sets most of the frame in place necessary to build both targets into the same image. There's a couple of cleanups in here that are kept in this series because they are intimately tied to the changes necessary to support the devicetree conversions. By Stephen Boyd via David Brown * tag 'msm-dt-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm: ARM: msm: Remove non-DT targets from 8960 ARM: msm: Add DT support for 8960 ARM: msm: Move io mapping prototypes to common.h ARM: msm: Rename board-msm8x60 to signify its DT only status ARM: msm: Make 8660 a DT only target ARM: msm: Move 8660 to DT timer ARM: msm: Add DT support to msm_timer ARM: msm: Allow timer.c to compile on multiple targets ARM: msm: Don't touch GIC registers outside of GIC code ARM: msm: Add msm8660-surf.dts to Makefile.boot ARM: msm: Add handle_irq handler for 8660 DT machine Resolved trivial context conflict in arch/arm/mach-msm/io.c and a remove/change conflict in arch/arm/mach-msm/board-msm8x60.c. Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/msm/timer.txt38
1 files changed, 38 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/msm/timer.txt b/Documentation/devicetree/bindings/arm/msm/timer.txt
new file mode 100644
index 00000000000..8c5907b9cae
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/timer.txt
@@ -0,0 +1,38 @@
+* MSM Timer
+
+Properties:
+
+- compatible : Should at least contain "qcom,msm-timer". More specific
+ properties such as "qcom,msm-gpt" and "qcom,msm-dgt" specify a general
+ purpose timer and a debug timer respectively.
+
+- interrupts : Interrupt indicating a match event.
+
+- reg : Specifies the base address of the timer registers. The second region
+ specifies an optional register used to configure the clock divider.
+
+- clock-frequency : The frequency of the timer in Hz.
+
+Optional:
+
+- cpu-offset : per-cpu offset used when the timer is accessed without the
+ CPU remapping facilities. The offset is cpu-offset * cpu-nr.
+
+Example:
+
+ timer@200a004 {
+ compatible = "qcom,msm-gpt", "qcom,msm-timer";
+ interrupts = <1 2 0x301>;
+ reg = <0x0200a004 0x10>;
+ clock-frequency = <32768>;
+ cpu-offset = <0x40000>;
+ };
+
+ timer@200a024 {
+ compatible = "qcom,msm-dgt", "qcom,msm-timer";
+ interrupts = <1 3 0x301>;
+ reg = <0x0200a024 0x10>,
+ <0x0200a034 0x4>;
+ clock-frequency = <6750000>;
+ cpu-offset = <0x40000>;
+ };