diff options
| author | Geert Uytterhoeven <geert+renesas@linux-m68k.org> | 2014-02-25 11:40:17 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2014-02-27 13:51:29 +0900 |
| commit | dc64d39b54c1e9db97a6fb1ca52598c981728157 (patch) | |
| tree | 4e68275a6ecd75f7ea65bd9d7d66c4007e1b1754 /Documentation | |
| parent | e6456186cae76f80446ba911f77eb2f85d3d927e (diff) | |
spi: spidev: Add support for Dual/Quad SPI Transfers
Add support for Dual/Quad SPI Transfers to the spidev API.
As this uses SPI mode bits that don't fit in a single byte, two new
ioctls (SPI_IOC_RD_MODE32 and SPI_IOC_WR_MODE32) are introduced.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/spi/spidev | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/spi/spidev b/Documentation/spi/spidev index ed2da5e5b28..3d14035b176 100644 --- a/Documentation/spi/spidev +++ b/Documentation/spi/spidev @@ -85,6 +85,12 @@ settings for data transfer parameters: SPI_MODE_0..SPI_MODE_3; or if you prefer you can combine SPI_CPOL (clock polarity, idle high iff this is set) or SPI_CPHA (clock phase, sample on trailing edge iff this is set) flags. + Note that this request is limited to SPI mode flags that fit in a + single byte. + + SPI_IOC_RD_MODE32, SPI_IOC_WR_MODE32 ... pass a pointer to a uin32_t + which will return (RD) or assign (WR) the full SPI transfer mode, + not limited to the bits that fit in one byte. SPI_IOC_RD_LSB_FIRST, SPI_IOC_WR_LSB_FIRST ... pass a pointer to a byte which will return (RD) or assign (WR) the bit justification used to |