Merge tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux

Pull clk framework fixes from Mike Turquette:
 "Clock framework and driver fixes, all of which fix user-visible
  regressions.

  There is a single framework fix that prevents dereferencing a NULL
  pointer when calling clk_get.  The range of fixes for clock driver
  regressions spans memory leak fixes, touching the wrong registers that
  cause things to explode, misconfigured clock rates that result in
  non-responsive devices and even some boot failures.  The most benign
  fix is DT binding doc typo.  It is a stable ABI exposed from the
  kernel that was introduced in -rc1, so best to fix it now"

* tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux: (25 commits)
  clk:at91: Fix memory leak in of_at91_clk_master_setup()
  clk: nomadik: fix multiplatform problem
  clk: Correct handling of NULL clk in __clk_{get, put}
  clk: shmobile: Fix typo in MSTP clock DT bindings
  clk: shmobile: rcar-gen2: Fix qspi divisor
  clk: shmobile: rcar-gen2: Fix clock parent for all non-PLL clocks
  clk: tegra124: remove gr2d and gr3d clocks
  clk: tegra: Fix vic03 mux index
  clk: shmobile: rcar-gen2: Fix qspi divisor
  clk: shmobile: rcar-gen2: Fix clock parent all non-PLL clocks
  clk: tegra: use max divider if divider overflows
  clk: tegra: cclk_lp has a pllx/2 divider
  clk: tegra: fix sdmmc clks on Tegra1x4
  clk: tegra: fix host1x clock on Tegra124
  clk: tegra: PLLD2 fixes for hdmi
  clk: tegra: Fix PLLD mnp table
  clk: tegra: Fix PLLP rate table
  clk: tegra: Correct clock number for UARTE
  clk: tegra: Add missing Tegra20 fuse clks
  ARM: keystone: dts: fix clkvcp3 control register address
  ...

1 files changed, 2 insertions, 2 deletions

diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
index a6a352c2771..5992dceec7a 100644
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
@@ -21,9 +21,9 @@ Required Properties:
     must appear in the same order as the output clocks.
   - #clock-cells: Must be 1
   - clock-output-names: The name of the clocks as free-form strings
-  - renesas,indices: Indices of the gate clocks into the group (0 to 31)
+  - renesas,clock-indices: Indices of the gate clocks into the group (0 to 31)
 
-The clocks, clock-output-names and renesas,indices properties contain one
+The clocks, clock-output-names and renesas,clock-indices properties contain one
 entry per gate clock. The MSTP groups are sparsely populated. Unimplemented
 gate clocks must not be declared.