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author | Mark Brown <broonie@linaro.org> | 2013-09-01 13:48:53 +0100 |
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committer | Mark Brown <broonie@linaro.org> | 2013-09-01 13:48:53 +0100 |
commit | afa8f0cd6c97379f4b6e5abb857e93efbcef799b (patch) | |
tree | 885dc458d3ca421d1e8e2e09c270139a361abb66 /Documentation | |
parent | 2f2613b028ed57cc17a5320ca88e608b218dd334 (diff) | |
parent | d8851a0d4f57537315fdb854f04724acdc87c424 (diff) |
Merge remote-tracking branch 'spi/topic/efm32' into spi-next
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/spi/efm32-spi.txt | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/efm32-spi.txt b/Documentation/devicetree/bindings/spi/efm32-spi.txt new file mode 100644 index 00000000000..a590ca51be7 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/efm32-spi.txt @@ -0,0 +1,34 @@ +* Energy Micro EFM32 SPI + +Required properties: +- #address-cells: see spi-bus.txt +- #size-cells: see spi-bus.txt +- compatible: should be "efm32,spi" +- reg: Offset and length of the register set for the controller +- interrupts: pair specifying rx and tx irq +- clocks: phandle to the spi clock +- cs-gpios: see spi-bus.txt +- location: Value to write to the ROUTE register's LOCATION bitfield to configure the pinmux for the device, see datasheet for values. + +Example: + +spi1: spi@0x4000c400 { /* USART1 */ + #address-cells = <1>; + #size-cells = <0>; + compatible = "efm32,spi"; + reg = <0x4000c400 0x400>; + interrupts = <15 16>; + clocks = <&cmu 20>; + cs-gpios = <&gpio 51 1>; // D3 + location = <1>; + status = "ok"; + + ks8851@0 { + compatible = "ks8851"; + spi-max-frequency = <6000000>; + reg = <0>; + interrupt-parent = <&boardfpga>; + interrupts = <4>; + status = "ok"; + }; +}; |