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| author | Thomas Gleixner <tglx@linutronix.de> | 2014-02-22 10:57:06 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2014-02-22 10:57:06 +0100 |
| commit | d0e3a9719f166a81db3bab1b6ec24f544473316c (patch) | |
| tree | 04cc5190af98aef8fa9717f7ae7feb0eba418fbe /Documentation | |
| parent | b04c644e670f79417f1728e6be310cfd8e6a921b (diff) | |
| parent | bc69b8adfe221def02ea10f7b9ab32e80195334c (diff) | |
Merge tag 'irqchip-mvebu-3.15' of git://git.infradead.org/linux-mvebu into irq/core
irqchip mvebu changes for v3.15
- armada-370-xp
- add MSI helper
- MPIC chained handler
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt b/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt index d74091a8a3b..5fc03134a99 100644 --- a/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt +++ b/Documentation/devicetree/bindings/arm/armada-370-xp-mpic.txt @@ -1,4 +1,4 @@ -Marvell Armada 370 and Armada XP Interrupt Controller +Marvell Armada 370, 375, 38x, XP Interrupt Controller ----------------------------------------------------- Required properties: @@ -16,7 +16,13 @@ Required properties: automatically map to the interrupt controller registers of the current CPU) +Optional properties: +- interrupts: If defined, then it indicates that this MPIC is + connected as a slave to another interrupt controller. This is + typically the case on Armada 375 and Armada 38x, where the MPIC is + connected as a slave to the Cortex-A9 GIC. The provided interrupt + indicate to which GIC interrupt the MPIC output is connected. Example: |