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authorLinus Torvalds <torvalds@linux-foundation.org>2011-07-23 14:05:44 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-07-23 14:05:44 -0700
commit6d6be43d4dfdb167ef72f4aa665c1607db799be4 (patch)
treeee4395a5089ae9cfd8a59960085f821883e3fd0f /Documentation
parentf5fc87905ea075a0b14878086fd4fe38be128844 (diff)
parent10617340ce1491da7654d408d0d635ba98ef8350 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (43 commits) Blackfin: spi-docs: further clarify GPIO CS behavior with various modes Blackfin: boards: fix pcm device name Blackfin: SMP: punt unused atomic_test_mask helper Blackfin: irqs: do not trace arch_local_{*,irq_*} functions Blackfin: bf526: restrict reboot workaround to 0.0 silicon Blackfin: bf51x: fix alternative portmux options Blackfin: bf54x: fix GPIO resume code Blackfin: dpmc: optimize SDRAM programming slightly Blackfin: dpmc: don't save/restore scratch registers Blackfin: bf538: pull gpio/port logic out of core hibernate paths Blackfin: dpmc: optimize hibernate/resume path Blackfin: dpmc: do not save/restore EVT0/EVT1/EVT4 when hibernating Blackfin: dpmc: relocate hibernate helper macros Blackfin: dpmc: omit RETE/RETN when hibernating Blackfin: dpmc: optimize SIC_IWR programming a little Blackfin: gpio/ints: generalize pint logic Blackfin: dpmc: bind to MMR names and not CPUs Blackfin: debug-mmrs: generalize pint logic Blackfin: bf54x: switch to common pint MMR struct Blackfin: bf54x: tweak MMR pint names ...
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/blackfin/bfin-spi-notes.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/blackfin/bfin-spi-notes.txt b/Documentation/blackfin/bfin-spi-notes.txt
index 556fa877f2e..eae6eaf2a09 100644
--- a/Documentation/blackfin/bfin-spi-notes.txt
+++ b/Documentation/blackfin/bfin-spi-notes.txt
@@ -9,6 +9,8 @@ the entire SPI transfer. - And not just bits_per_word duration.
In most cases you can utilize SPI MODE_3 instead of MODE_0 to work-around this
behavior. If your SPI slave device in question requires SPI MODE_0 or MODE_2
timing, you can utilize the GPIO controlled SPI Slave Select option instead.
+In this case, you should use GPIO based CS for all of your slaves and not just
+the ones using mode 0 or 2 in order to guarantee correct CS toggling behavior.
You can even use the same pin whose peripheral role is a SSEL,
but use it as a GPIO instead.