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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-04-30 11:10:09 +1000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-04-30 11:10:09 +1000
commitbc23100a0d646aedb6e17fbcecdc35a24cd3bf2a (patch)
treeafbf44b177d17a8450d606b6d976e76e8e964273 /Documentation
parent28bf41a1fedad76e9b4de70c9573bb3f8afc3709 (diff)
parent9e2ecdbba3b0745f9ed454ab86961e3ccf9dc224 (diff)
Merge remote-tracking branch 'kumar/next' into next
From Kumar Gala: << Add support for T4 and B4 SoC families from Freescale, e6500 altivec support, some various board fixes and other minor cleanups. >>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/cpus.txt22
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+===================================================================
+Power Architecture CPU Binding
+Copyright 2013 Freescale Semiconductor Inc.
+
+Power Architecture CPUs in Freescale SOCs are represented in device trees as
+per the definition in ePAPR.
+
+In addition to the ePAPR definitions, the properties defined below may be
+present on CPU nodes.
+
+PROPERTIES
+
+ - fsl,eref-*
+ Usage: optional
+ Value type: <empty>
+ Definition: The EREF (EREF: A Programmer.s Reference Manual for
+ Freescale Power Architecture) defines the architecture for Freescale
+ Power CPUs. The EREF defines some architecture categories not defined
+ by the Power ISA. For these EREF-specific categories, the existence of
+ a property named fsl,eref-[CAT], where [CAT] is the abbreviated category
+ name with all uppercase letters converted to lowercase, indicates that
+ the category is supported by the implementation.