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authorPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>2009-09-30 12:07:16 +0000
committerDavid S. Miller <davem@davemloft.net>2009-09-30 20:02:52 -0700
commit84f62d4b5888bd1a254d6055e5ff6989bae8a6a9 (patch)
tree78421a00358767a96d96c88b2a9aa0bc0aaa5e83 /arch/alpha/include
parent8c185ab6185bf5e67766edb000ce428269364c86 (diff)
ixgbe: Fix disabling of relaxed ordering with Tx DCA
82599 has a different register offset for the Tx DCA control registers. We disable relaxed ordering of the descriptor writebacks for Tx head writeback, but didn't disable it properly for 82599. However, this shouldn't be a visible issue, since ixgbe doesn't use Tx head writeback. This patch just makes sure we're not doing blind writes to offsets we don't expect. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/alpha/include')
0 files changed, 0 insertions, 0 deletions