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authorVineet Gupta <vgupta@synopsys.com>2013-05-13 17:23:58 +0530
committerVineet Gupta <vgupta@synopsys.com>2013-06-22 19:23:19 +0530
commit2ed21dae021db1f9f988494ceee519290217520d (patch)
treed7354ec3e76a08e933b8481b6c0b7f8c6a7e51a7 /arch/arc/mm/tlb.c
parentfedf5b9bafca5cd8af99993d1b9cfd13c1dc2c5b (diff)
ARC: [mm] Assume pagecache page dirty by default
Similar to ARM/SH Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/mm/tlb.c')
-rw-r--r--arch/arc/mm/tlb.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c
index 1c91dbc8ddd..d44ae33c2d1 100644
--- a/arch/arc/mm/tlb.c
+++ b/arch/arc/mm/tlb.c
@@ -453,7 +453,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned,
if ((vma->vm_flags & VM_EXEC) ||
addr_not_cache_congruent(paddr, vaddr)) {
- int dirty = test_and_clear_bit(PG_arch_1, &page->flags);
+ int dirty = !test_and_set_bit(PG_dc_clean, &page->flags);
if (dirty) {
/* wback + inv dcache lines */
__flush_dcache_page(paddr, paddr);