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authorWill Deacon <will.deacon@arm.com>2010-04-30 11:37:51 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-05-17 11:53:58 +0100
commitfe166148f699cc7865ca07b6754872cfb5ebc312 (patch)
tree421392e3fb9866c40cc8cfd952be44fd63336221 /arch/arm/Kconfig
parent8c1fc96f6fd1f361428ba805103af0d0eee65179 (diff)
ARM: 6073/1: oprofile: remove old files and update KConfig
Enable hardware perf-events if CPU_HAS_PMU and select HAVE_OPROFILE if HAVE_PERF_EVENTS. If no hardware support is present, OProfile will fall back to timer mode. This patch also removes the old OProfile drivers in favour of the code implemented by perf. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig26
1 files changed, 2 insertions, 24 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index daaa4b2b46e..f7c2a882b54 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -13,7 +13,7 @@ config ARM
select RTC_LIB
select SYS_SUPPORTS_APM_EMULATION
select GENERIC_ATOMIC64 if (!CPU_32v6K)
- select HAVE_OPROFILE
+ select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
select HAVE_ARCH_KGDB
select HAVE_KPROBES if (!XIP_KERNEL)
select HAVE_KRETPROBES if (HAVE_KPROBES)
@@ -181,28 +181,6 @@ config ARM_L1_CACHE_SHIFT_6
help
Setting ARM L1 cache line size to 64 Bytes.
-if OPROFILE
-
-config OPROFILE_ARMV6
- def_bool y
- depends on CPU_V6 && !SMP
- select OPROFILE_ARM11_CORE
-
-config OPROFILE_MPCORE
- def_bool y
- depends on CPU_V6 && SMP
- select OPROFILE_ARM11_CORE
-
-config OPROFILE_ARM11_CORE
- bool
-
-config OPROFILE_ARMV7
- def_bool y
- depends on CPU_V7 && !SMP
- bool
-
-endif
-
config VECTORS_BASE
hex
default 0xffff0000 if MMU || CPU_HIGH_VECTOR
@@ -1334,7 +1312,7 @@ config HIGHPTE
config HW_PERF_EVENTS
bool "Enable hardware performance counter support for perf events"
- depends on PERF_EVENTS && CPU_HAS_PMU && (CPU_V6 || CPU_V7)
+ depends on PERF_EVENTS && CPU_HAS_PMU
default y
help
Enable hardware performance counter support for perf events. If