diff options
author | Jon Hunter <jon-hunter@ti.com> | 2012-10-19 09:59:00 -0500 |
---|---|---|
committer | Benoit Cousson <b-cousson@ti.com> | 2012-10-29 16:56:32 +0100 |
commit | fab8ad0b2b5f2b6d25c6020a61bf3339e53fec61 (patch) | |
tree | 8a0ddc775d0feae45f97b8d79a3cdd2b239ad9aa /arch/arm/boot/dts/am33xx.dtsi | |
parent | 4c94ac29b5c1f0cef2281df97609f2cbcc09cf9c (diff) |
ARM: dts: OMAP: Add timer nodes
Add the 12 GP timers nodes present in OMAP2.
Add the 12 GP timers nodes present in OMAP3.
Add the 11 GP timers nodes present in OMAP4.
Add the 7 GP timers nodes present in AM33xx.
Add documentation for timer properties specific to OMAP.
Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified
Vaibhav's original nodes adding information on which timers support a PWM
output.
V5 changes:
- Updated timer register sizes for OMAP2/3/4.
- Modified AM335x timer register size to be 1KB instead of 4KB to align with
HWMOD.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/am33xx.dtsi')
-rw-r--r-- | arch/arm/boot/dts/am33xx.dtsi | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 470926946ed..70d24b848c1 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -237,5 +237,59 @@ interrupts = <55>; status = "disabled"; }; + + timer1: timer@44e31000 { + compatible = "ti,omap2-timer"; + reg = <0x44e31000 0x400>; + interrupts = <67>; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; + + timer2: timer@48040000 { + compatible = "ti,omap2-timer"; + reg = <0x48040000 0x400>; + interrupts = <68>; + ti,hwmods = "timer2"; + }; + + timer3: timer@48042000 { + compatible = "ti,omap2-timer"; + reg = <0x48042000 0x400>; + interrupts = <69>; + ti,hwmods = "timer3"; + }; + + timer4: timer@48044000 { + compatible = "ti,omap2-timer"; + reg = <0x48044000 0x400>; + interrupts = <92>; + ti,hwmods = "timer4"; + ti,timer-pwm; + }; + + timer5: timer@48046000 { + compatible = "ti,omap2-timer"; + reg = <0x48046000 0x400>; + interrupts = <93>; + ti,hwmods = "timer5"; + ti,timer-pwm; + }; + + timer6: timer@48048000 { + compatible = "ti,omap2-timer"; + reg = <0x48048000 0x400>; + interrupts = <94>; + ti,hwmods = "timer6"; + ti,timer-pwm; + }; + + timer7: timer@4804a000 { + compatible = "ti,omap2-timer"; + reg = <0x4804a000 0x400>; + interrupts = <95>; + ti,hwmods = "timer7"; + ti,timer-pwm; + }; }; }; |