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authorJames Morris <james.l.morris@oracle.com>2014-01-06 22:23:01 +1100
committerJames Morris <james.l.morris@oracle.com>2014-01-06 22:23:01 +1100
commit38fd2c202a3d82bc12430bce5789fa2c2a406f71 (patch)
treea73513dbb015155f5236b391709b9083916b3136 /arch/arm/boot/dts/armada-370-db.dts
parentdcf4e392867bf98d50ad108ed7c2bfb941e8c33d (diff)
parentd6e0a2dd12f4067a5bcefb8bbd8ddbeff800afbc (diff)
Merge to v3.13-rc7 for prerequisite changes in the Xen code for TPM
Diffstat (limited to 'arch/arm/boot/dts/armada-370-db.dts')
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts28
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 90ce29dbe11..08a56bcfc72 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -99,22 +99,22 @@
spi-max-frequency = <50000000>;
};
};
+ };
- pcie-controller {
+ pcie-controller {
+ status = "okay";
+ /*
+ * The two PCIe units are accessible through
+ * both standard PCIe slots and mini-PCIe
+ * slots on the board.
+ */
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+ pcie@2,0 {
+ /* Port 1, Lane 0 */
status = "okay";
- /*
- * The two PCIe units are accessible through
- * both standard PCIe slots and mini-PCIe
- * slots on the board.
- */
- pcie@1,0 {
- /* Port 0, Lane 0 */
- status = "okay";
- };
- pcie@2,0 {
- /* Port 1, Lane 0 */
- status = "okay";
- };
};
};
};