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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-03-02 20:54:37 +0800
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-03-15 23:37:56 +0800
commita7776ec625c8ca90d050953946a5b72eaf41c21c (patch)
treecc2717698bc80e5511b06fa83936f0fd9617aa9c /arch/arm/boot/dts/at91sam9g20.dtsi
parentc8082d344ac4c05932fec1766e5e9ce72cf286ed (diff)
ARM: at91: add ram controller DT support
We can now drop the call to ioremap_registers() as we have the binding for the SDRAM/DDR Controller. Drop ioremap_registers() for sam9x5 too. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9g20.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index bcad6e7dccc..0a1df8d9bfb 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -59,6 +59,11 @@
reg = <0xfffff000 0x200>;
};
+ ramc0: ramc@ffffea00 {
+ compatible = "atmel,at91sam9260-sdramc";
+ reg = <0xffffea00 0x200>;
+ };
+
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;