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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-07-05 16:56:09 +0800
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-10-13 09:21:44 +0800
commitec6754a7b9e90a1eba7f3b2812003bb51d3dcf30 (patch)
tree568b5afbb394672e99521d1407e9e8b5be592dd6 /arch/arm/boot/dts/at91sam9g35.dtsi
parent5314ec8e52263b56edd6a37d089b3b675d50e3f1 (diff)
arm: at91: dt: at91sam9 add serial pinctrl support
Set the dbgu pinctrl config by default as we have only one possible config For other uart set the rxd/txd by default. For at91sam9x5ek create soc based dts as we need to include specific soc dtsi. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9g35.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9g35.dtsi28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9g35.dtsi b/arch/arm/boot/dts/at91sam9g35.dtsi
new file mode 100644
index 00000000000..f9d14a72279
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9g35.dtsi
@@ -0,0 +1,28 @@
+/*
+ * at91sam9g35.dtsi - Device Tree Include file for AT91SAM9G35 SoC
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+
+/include/ "at91sam9x5.dtsi"
+
+/ {
+ model = "Atmel AT91SAM9G35 SoC";
+ compatible = "atmel, at91sam9g35, atmel,at91sam9x5";
+
+ ahb {
+ apb {
+ pinctrl@fffff400 {
+ atmel,mux-mask = <
+ /* A B C */
+ 0xffffffff 0xffe0399f 0xc000000c /* pioA */
+ 0x000406ff 0x00047e3f 0x00000000 /* pioB */
+ 0xfdffffff 0x00000000 0xb83fffff /* pioC */
+ 0x003fffff 0x003f8000 0x00000000 /* pioD */
+ >;
+ };
+ };
+ };
+};