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authorStephen Warren <swarren@wwwdotorg.org>2014-02-11 21:44:35 -0700
committerStephen Warren <swarren@wwwdotorg.org>2014-02-11 21:49:54 -0700
commitef3c690cde1e9e42baa20bb5ce9196c371593f60 (patch)
tree9dd77dcb79615af4721e65163a2350d6f7a62e38 /arch/arm/boot/dts/bcm2835.dtsi
parent9511cc4df0072df9e6d55c212711d4c103ac917d (diff)
ARM: bcm2835: fix DT node sort order
Re-order all the DT nodes so that they're ordered by their reg address. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Diffstat (limited to 'arch/arm/boot/dts/bcm2835.dtsi')
-rw-r--r--arch/arm/boot/dts/bcm2835.dtsi32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 398eac377e3..5ceba45b884 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -60,14 +60,6 @@
reg = <0x7e104000 0x10>;
};
- uart@20201000 {
- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
- reg = <0x7e201000 0x1000>;
- interrupts = <2 25>;
- clock-frequency = <3000000>;
- arm,primecell-periphid = <0x00241011>;
- };
-
gpio: gpio {
compatible = "brcm,bcm2835-gpio";
reg = <0x7e200000 0xb4>;
@@ -91,6 +83,14 @@
#interrupt-cells = <2>;
};
+ uart@20201000 {
+ compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
+ reg = <0x7e201000 0x1000>;
+ interrupts = <2 25>;
+ clock-frequency = <3000000>;
+ arm,primecell-periphid = <0x00241011>;
+ };
+
i2s: i2s@7e203000 {
compatible = "brcm,bcm2835-i2s";
reg = <0x7e203000 0x20>,
@@ -121,6 +121,14 @@
status = "disabled";
};
+ sdhci: sdhci {
+ compatible = "brcm,bcm2835-sdhci";
+ reg = <0x7e300000 0x100>;
+ interrupts = <2 30>;
+ clocks = <&clk_mmc>;
+ status = "disabled";
+ };
+
i2c1: i2c@20804000 {
compatible = "brcm,bcm2835-i2c";
reg = <0x7e804000 0x1000>;
@@ -131,14 +139,6 @@
status = "disabled";
};
- sdhci: sdhci {
- compatible = "brcm,bcm2835-sdhci";
- reg = <0x7e300000 0x100>;
- interrupts = <2 30>;
- clocks = <&clk_mmc>;
- status = "disabled";
- };
-
usb {
compatible = "brcm,bcm2835-usb";
reg = <0x7e980000 0x10000>;