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authorAntoine Tenart <antoine.tenart@free-electrons.com>2014-05-19 22:03:00 +0200
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2014-05-19 23:02:33 +0200
commit0d859a6a9d1473cdc207eeef436bc2dd1e04e776 (patch)
tree470572ec919da2b05dda5b11408261432541a1a2 /arch/arm/boot/dts/berlin2q.dtsi
parent50cc24ffcdbce9d0904a4ed89ae14fdf76522de5 (diff)
ARM: dts: berlin: add the SDHCI nodes for the BG2Q
Add the SDHCI nodes for the Marvell Berlin BG2Q, using the mrvl,pxav3-mmc driver. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/berlin2q.dtsi')
-rw-r--r--arch/arm/boot/dts/berlin2q.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 81712f5954e..635a16a64cb 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -62,6 +62,30 @@
ranges = <0 0xf7000000 0x1000000>;
interrupt-parent = <&gic>;
+ sdhci0: sdhci@ab0000 {
+ compatible = "mrvl,pxav3-mmc";
+ reg = <0xab0000 0x200>;
+ clocks = <&chip CLKID_SDIO1XIN>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sdhci1: sdhci@ab0800 {
+ compatible = "mrvl,pxav3-mmc";
+ reg = <0xab0800 0x200>;
+ clocks = <&chip CLKID_SDIO1XIN>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
+ sdhci2: sdhci@ab1000 {
+ compatible = "mrvl,pxav3-mmc";
+ reg = <0xab1000 0x200>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&chip CLKID_SDIO1XIN>;
+ status = "disabled";
+ };
+
l2: l2-cache-controller@ac0000 {
compatible = "arm,pl310-cache";
reg = <0xac0000 0x1000>;