diff options
| author | Sachin Kamat <sachin.kamat@linaro.org> | 2013-12-12 07:32:39 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-01-04 16:11:21 +0900 |
| commit | 9dd51c9f778199d343ae55db8a7d084e27501211 (patch) | |
| tree | 69155284835c669dc34e227ded38531be819e272 /arch/arm/boot/dts/exynos5420-arndale-octa.dts | |
| parent | a22d060e3299ce672258d00070fa0ed398c035c5 (diff) | |
ARM: dts: Add initial support for Arndale Octa board
Arndale Octa board is based on Exynos5420 SoC. This patch
adds the basic support required for booting it through DT.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos5420-arndale-octa.dts')
| -rw-r--r-- | arch/arm/boot/dts/exynos5420-arndale-octa.dts | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts new file mode 100644 index 00000000000..7340745ff97 --- /dev/null +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -0,0 +1,66 @@ +/* + * Samsung's Exynos5420 based Arndale Octa board device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos5420.dtsi" + +/ { + model = "Insignal Arndale Octa evaluation board based on EXYNOS5420"; + compatible = "insignal,arndale-octa", "samsung,exynos5420"; + + memory { + reg = <0x20000000 0x80000000>; + }; + + chosen { + bootargs = "console=ttySAC3,115200"; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; + }; + + mmc@12200000 { + status = "okay"; + broken-cd; + supports-highspeed; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; + + slot@0 { + reg = <0>; + bus-width = <8>; + }; + }; + + mmc@12220000 { + status = "okay"; + supports-highspeed; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + + slot@0 { + reg = <0>; + bus-width = <4>; + }; + }; +}; |