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authorFabio Estevam <fabio.estevam@freescale.com>2014-04-17 15:23:30 -0300
committerShawn Guo <shawn.guo@freescale.com>2014-05-16 23:02:01 +0800
commitb41331ecebb2e1bbaeb96d2a5b7bfd79834b0137 (patch)
treea49818552d75129878e05281f7282a06ee37610f /arch/arm/boot/dts/imx27-pdk.dts
parent126b469677762aecc7cc4ed164421a8e4b3dc1c0 (diff)
ARM: dts: imx27-pdk: Add NAND support
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx27-pdk.dts')
-rw-r--r--arch/arm/boot/dts/imx27-pdk.dts20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx27-pdk.dts b/arch/arm/boot/dts/imx27-pdk.dts
index 971961f8eef..042d7ffdffe 100644
--- a/arch/arm/boot/dts/imx27-pdk.dts
+++ b/arch/arm/boot/dts/imx27-pdk.dts
@@ -84,6 +84,14 @@
status = "okay";
};
+&nfc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nand>;
+ nand-ecc-mode = "hw";
+ nand-on-flash-bbt;
+ status = "okay";
+};
+
&uart1 {
fsl,uart-has-rtscts;
pinctrl-names = "default";
@@ -135,6 +143,18 @@
>;
};
+ pinctrl_nand: nandgrp {
+ fsl,pins = <
+ MX27_PAD_NFRB__NFRB 0x0
+ MX27_PAD_NFCLE__NFCLE 0x0
+ MX27_PAD_NFWP_B__NFWP_B 0x0
+ MX27_PAD_NFCE_B__NFCE_B 0x0
+ MX27_PAD_NFALE__NFALE 0x0
+ MX27_PAD_NFRE_B__NFRE_B 0x0
+ MX27_PAD_NFWE_B__NFWE_B 0x0
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX27_PAD_UART1_TXD__UART1_TXD 0x0