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authorFabio Estevam <fabio.estevam@freescale.com>2013-06-09 22:07:47 -0300
committerShawn Guo <shawn.guo@linaro.org>2013-07-15 22:28:52 +0800
commit84bb08472520882394fe16d7a3548793302563de (patch)
treebb951caf06a634a0575af0dbe2705f836abda718 /arch/arm/boot/dts/imx51-babbage.dts
parent15968f1bd4341cfa54023348a4e0b94798211742 (diff)
ARM: dts: imx51-babbage: Pass a real clock to the codec
On imx51_babbage the codec clock is activated via GPIO4_26. Provide a real clock to the sgtl5000 codec via device tree. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx51-babbage.dts')
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts13
1 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 6dd9486c755..ad3471ca17c 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -61,6 +61,16 @@
mux-int-port = <2>;
mux-ext-port = <3>;
};
+
+ clocks {
+ clk_26M: codec_clock {
+ compatible = "fixed-clock";
+ reg=<0>;
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ gpios = <&gpio4 26 1>;
+ };
+ };
};
&esdhc1 {
@@ -229,6 +239,7 @@
MX51_PAD_EIM_A27__GPIO2_21 0x5
MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
+ MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
>;
};
};
@@ -255,7 +266,7 @@
sgtl5000: codec@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
- clock-frequency = <26000000>;
+ clocks = <&clk_26M>;
VDDA-supply = <&vdig_reg>;
VDDIO-supply = <&vvideo_reg>;
};