diff options
| author | Philipp Zabel <p.zabel@pengutronix.de> | 2013-03-28 17:35:22 +0100 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-09 22:53:37 +0800 |
| commit | bd3d924d71a45b88941b50ddaa77aadb2ae4ded7 (patch) | |
| tree | 093e2228dfad4f2c797c82135093d2763708f386 /arch/arm/boot/dts/imx6qdl.dtsi | |
| parent | 8d84c3740fb0c97b5b01ad565f9d4e2ca84bf670 (diff) | |
ARM i.MX5: Add System Reset Controller (SRC) support for i.MX51 and i.MX53
The SRC in i.MX51 and i.MX53 is similar to the one in i.MX6q minus
the IPU2 reset line and multi core CPU reset/enable bits.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 8b6dfd1a1b2..8805adb7c7f 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -520,7 +520,7 @@ }; src: src@020d8000 { - compatible = "fsl,imx6q-src"; + compatible = "fsl,imx6q-src", "fsl,imx51-src"; reg = <0x020d8000 0x4000>; interrupts = <0 91 0x04 0 96 0x04>; #reset-cells = <1>; |