diff options
| author | Enric Balletbo i Serra <eballetbo@iseebcn.com> | 2014-11-06 13:01:41 +0100 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2014-11-12 07:04:36 -0800 |
| commit | 86f9abb6ec730441731bc5aff3e3865c9186bb13 (patch) | |
| tree | bf64db048bd2eb3937f27942ccf29af19dd184ae /arch/arm/boot/dts/omap3-igep0020.dts | |
| parent | 4f6dec7068de704af072af36ef5b8617841503fc (diff) | |
ARM: dts: omap3-igep00x0: Fix UART2 pins that aren't common.
UART2 is used to connect the processor with the bluetooth chip, these pins
are not common between IGEPv2 boards and IGEP COM MODULE boards. This patch
muxes the correct pins for every board and removes UART2 configuration from
common omap3-igep.dtsi file.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3-igep0020.dts')
| -rw-r--r-- | arch/arm/boot/dts/omap3-igep0020.dts | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index cc9343e836c..87d77e4ce6f 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -149,6 +149,15 @@ 0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */ >; }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */ + OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/ + OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ + OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ + >; + }; }; &omap3_pmx_core2 { @@ -256,6 +265,11 @@ }; }; +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; +}; + &usbhshost { port1-mode = "ehci-phy"; }; |