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authorNathan Lynch <nathan_lynch@mentor.com>2014-03-19 10:45:53 -0500
committerTony Lindgren <tony@atomide.com>2014-05-06 10:19:49 -0700
commit69a126cbed4b932bcdf363f62b6646a5e8d17435 (patch)
tree468416a94200f9290af12c2ab5d0335da44ba3b3 /arch/arm/boot/dts/omap5.dtsi
parent79f7f37a569e80dce060fa54f638b7e66384cf42 (diff)
ARM: dts: OMAP5: add pmu node
Expose the PMU on OMAP5. Tested with perf on OMAP5 uEVM. Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap5.dtsi')
-rw-r--r--arch/arm/boot/dts/omap5.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index f8c9855ce58..ae144db8908 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -82,6 +82,12 @@
<GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>;
};
+ pmu {
+ compatible = "arm,cortex-a15-pmu";
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
gic: interrupt-controller@48211000 {
compatible = "arm,cortex-a15-gic";
interrupt-controller;