diff options
| author | Dinh Nguyen <dinguyen@altera.com> | 2014-04-02 21:14:57 -0500 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@altera.com> | 2014-05-05 22:33:15 -0500 |
| commit | bd785efda77c073e8ed5c7f29c7bdab6a3f3f6ad (patch) | |
| tree | 0fe222c0fd1e58e2f656d630b6ce77451234a5c2 /arch/arm/boot/dts/socfpga_cyclone5.dtsi | |
| parent | 58303f1f961d6a1abc0496790c9c557d67e9ae64 (diff) | |
ARM: socfpga: dts: Remove hard coded clock-frequency property
The timers and uart can get their clock frequencies using the common clock
driver.
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_cyclone5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5.dtsi | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi index 63a951366a9..bf511828729 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi @@ -45,30 +45,6 @@ status = "okay"; }; - timer0@ffc08000 { - clock-frequency = <100000000>; - }; - - timer1@ffc09000 { - clock-frequency = <100000000>; - }; - - timer2@ffd00000 { - clock-frequency = <25000000>; - }; - - timer3@ffd01000 { - clock-frequency = <25000000>; - }; - - serial0@ffc02000 { - clock-frequency = <100000000>; - }; - - serial1@ffc03000 { - clock-frequency = <100000000>; - }; - sysmgr@ffd08000 { cpu1-start-addr = <0xffd080c4>; }; |