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author | Vipul Kumar Samar <vipulkumar.samar@st.com> | 2012-07-06 15:52:36 +0530 |
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committer | Shiraz Hashim <shiraz.hashim@st.com> | 2012-07-18 10:04:53 +0530 |
commit | d4f513ff12c1d74b379715e78c01002f5d055315 (patch) | |
tree | c29bb95a5f7f113d162785d30e7d7d5393cbb8bc /arch/arm/boot/dts/spear320-evb.dts | |
parent | d9ba8db2157654e2fc159a63c4b6eb8cffb352ae (diff) |
Clk: SPEAr1340: Update sys clock parent array
sys_clk has multiple parents and selection of parent depends on sys_clk_ctrl
register bit no. 23:25, with following possibilities
0XX: pll1_clk
10X: sys_synth_clk
110: pll2_clk
111: pll3_clk
Out of several possibilities (h/w wise) to select same clock parent for
sys_clk, current clock implementation was considering just one value.
When bootloader programmed different (valid) value to select a clock
parent then Linux breaks.
Here, we try to include all possibilities which can lead to same
clock selection thus making Linux independent of bootloader selection
values.
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/spear320-evb.dts')
0 files changed, 0 insertions, 0 deletions