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authorLinus Walleij <linus.walleij@linaro.org>2013-04-22 11:00:02 +0200
committerLinus Walleij <linus.walleij@linaro.org>2013-06-17 13:54:29 +0200
commitd134636f370070f0aa43bb4b145ed60c440eff17 (patch)
tree45e7358617044e9fad04fe3bed24eff08ac95266 /arch/arm/boot/dts/ste-u300.dts
parent20d4af68306c0e9b61ec158570502d4f89a00014 (diff)
ARM: u300: add FSMC flash into the device tree
This registers the U300 FSMC flash controller from the device tree, and defines the three partitions. Skip the BBT scan as in the current platform data. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ste-u300.dts')
-rw-r--r--arch/arm/boot/dts/ste-u300.dts26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts
index 1b20769d261..b8a8ddb5abf 100644
--- a/arch/arm/boot/dts/ste-u300.dts
+++ b/arch/arm/boot/dts/ste-u300.dts
@@ -77,6 +77,32 @@
dma-channels = <40>;
};
+ /* A NAND flash of 128 MiB */
+ fsmc: flash@40000000 {
+ compatible = "stericsson,fsmc-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x9f800000 0x1000>, /* FSMC Register*/
+ <0x80000000 0x4000>, /* NAND Base DATA */
+ <0x80020000 0x4000>, /* NAND Base ADDR */
+ <0x80010000 0x4000>; /* NAND Base CMD */
+ reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
+ nand-skip-bbtscan;
+
+ partition@0 {
+ label = "boot records";
+ reg = <0x0 0x20000>;
+ };
+ partition@20000 {
+ label = "free";
+ reg = <0x20000 0x7e0000>;
+ };
+ partition@800000 {
+ label = "platform";
+ reg = <0x800000 0xf800000>;
+ };
+ };
+
i2c0: i2c@c0004000 {
compatible = "st,ddci2c";
reg = <0xc0004000 0x1000>;