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authorGabriel FERNANDEZ <gabriel.fernandez@st.com>2014-05-20 15:22:00 +0200
committerMaxime Coquelin <maxime.coquelin@st.com>2014-05-21 14:27:08 +0200
commited3593f98603110e504c2552eed50c62233e648a (patch)
tree55b98421215217a92e5fc8f0a0dc9765043c2a0b /arch/arm/boot/dts/stih416-clock.dtsi
parente92cc8810194504085423185e785a9577a41b65a (diff)
ARM: STi: DT: STiH41x: Rename CLK_SYSIN into clk_sysin
all-caps node name is not very usual. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih416-clock.dtsi')
-rw-r--r--arch/arm/boot/dts/stih416-clock.dtsi5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/stih416-clock.dtsi b/arch/arm/boot/dts/stih416-clock.dtsi
index a6942c75cbb..10f8389ce9e 100644
--- a/arch/arm/boot/dts/stih416-clock.dtsi
+++ b/arch/arm/boot/dts/stih416-clock.dtsi
@@ -6,16 +6,17 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+
/ {
clocks {
+
/*
* Fixed 30MHz oscillator inputs to SoC
*/
- CLK_SYSIN: CLK_SYSIN {
+ clk_sysin: clk-sysin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <30000000>;
- clock-output-names = "CLK_SYSIN";
};
/*