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authorLinus Walleij <linus.walleij@linaro.org>2011-08-12 13:54:42 +0200
committerLinus Walleij <linus.walleij@linaro.org>2011-09-22 14:07:34 +0200
commit1bf6d2c1bb23533af6930581cc39b74685bc29de (patch)
tree08e7bdcd7389fba9b17f01e6d6951b7b32fd6d6b /arch/arm/boot/dts/tegra-seaboard.dts
parente0628d25ce9cea371e07cba5ee470af63e602a41 (diff)
ARM: mach-ux500: unlock I&D l2x0 caches before init
Apparently U8500 U-Boot versions may leave the l2x0 locked down before executing the kernel. Make sure we unlock it before we initialize the l2x0. This fixes a performance problem reported by Jan Rinze. The l2x0 core has been modified to unlock the l2x0 by default, but it will not touch the locking registers if the l2x0 was already enabled, as on the ux500, so we need this quirk to make sure it is properly turned off. Cc: stable@kernel.org Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Adrian Bunk <adrian.bunk@movial.com> Reported-by: Jan Rinze <janrinze@gmail.com> Tested-by: Robert Marklund <robert.marklund@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/tegra-seaboard.dts')
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