diff options
author | Olof Johansson <olof@lixom.net> | 2013-06-07 17:51:39 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2013-06-07 17:52:38 -0700 |
commit | 94937fff01fdeff2f2bd36f739d9cb80c775ed50 (patch) | |
tree | 9111c29b0468d8490fe3194d94948fb96772bdd6 /arch/arm/boot/dts/wm8505.dtsi | |
parent | 54edc2524d0b3c60d7ff6fe2b779acfcc401c45b (diff) | |
parent | e36572b64df358f0bc3a508e8761c81d7f3b8215 (diff) |
Merge tag 'vt8500/dts-3.11' of git://github.com/linux-wmt/linux-vtwm into next/dt
From Tony Prisk, vt8500 devicetree updates for 3.11.
* tag 'vt8500/dts-3.11' of git://github.com/linux-wmt/linux-vtwm:
dts: vt8500: Correct reference clock on WM8850 SoCs
dts: vt8500: Add ARM, AHB, APB and DDR clock nodes to SoC files
dts: vt8500: Populate missing PLL nodes
dts: clk: vt8500: Update SoC dtsi to use WM8850 PLL clocks
dts: vt8500: Update serial nodes and disable by default in SoC files
dts: vt8500: Add devicetree support for WM8750 SoC and APC8750 board
dts: vt8500: Fix invalid/missing cpu nodes for soc files.
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/wm8505.dtsi')
-rw-r--r-- | arch/arm/boot/dts/wm8505.dtsi | 84 |
1 files changed, 76 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi index b2bf359e852..a1a854b8a45 100644 --- a/arch/arm/boot/dts/wm8505.dtsi +++ b/arch/arm/boot/dts/wm8505.dtsi @@ -12,11 +12,24 @@ compatible = "wm,wm8505"; cpus { - cpu@0 { - compatible = "arm,arm926ejs"; + #address-cells = <0>; + #size-cells = <0>; + + cpu { + device_type = "cpu"; + compatible = "arm,arm926ej-s"; }; }; + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -68,6 +81,13 @@ clock-frequency = <25000000>; }; + plla: plla { + #clock-cells = <0>; + compatible = "via,vt8500-pll-clock"; + clocks = <&ref25>; + reg = <0x200>; + }; + pllb: pllb { #clock-cells = <0>; compatible = "via,vt8500-pll-clock"; @@ -75,6 +95,48 @@ reg = <0x204>; }; + pllc: pllc { + #clock-cells = <0>; + compatible = "via,vt8500-pll-clock"; + clocks = <&ref25>; + reg = <0x208>; + }; + + plld: plld { + #clock-cells = <0>; + compatible = "via,vt8500-pll-clock"; + clocks = <&ref25>; + reg = <0x20c>; + }; + + clkarm: arm { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&plla>; + divisor-reg = <0x300>; + }; + + clkahb: ahb { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x304>; + }; + + clkapb: apb { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&pllb>; + divisor-reg = <0x350>; + }; + + clkddr: ddr { + #clock-cells = <0>; + compatible = "via,vt8500-device-clock"; + clocks = <&plld>; + divisor-reg = <0x310>; + }; + clkuart0: uart0 { #clock-cells = <0>; compatible = "via,vt8500-device-clock"; @@ -163,46 +225,52 @@ reg = <0xd8050400 0x100>; }; - uart@d8200000 { + uart0: serial@d8200000 { compatible = "via,vt8500-uart"; reg = <0xd8200000 0x1040>; interrupts = <32>; clocks = <&clkuart0>; + status = "disabled"; }; - uart@d82b0000 { + uart1: serial@d82b0000 { compatible = "via,vt8500-uart"; reg = <0xd82b0000 0x1040>; interrupts = <33>; clocks = <&clkuart1>; + status = "disabled"; }; - uart@d8210000 { + uart2: serial@d8210000 { compatible = "via,vt8500-uart"; reg = <0xd8210000 0x1040>; interrupts = <47>; clocks = <&clkuart2>; + status = "disabled"; }; - uart@d82c0000 { + uart3: serial@d82c0000 { compatible = "via,vt8500-uart"; reg = <0xd82c0000 0x1040>; interrupts = <50>; clocks = <&clkuart3>; + status = "disabled"; }; - uart@d8370000 { + uart4: serial@d8370000 { compatible = "via,vt8500-uart"; reg = <0xd8370000 0x1040>; interrupts = <31>; clocks = <&clkuart4>; + status = "disabled"; }; - uart@d8380000 { + uart5: serial@d8380000 { compatible = "via,vt8500-uart"; reg = <0xd8380000 0x1040>; interrupts = <30>; clocks = <&clkuart5>; + status = "disabled"; }; rtc@d8100000 { |