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authorAndreas Färber <afaerber@suse.de>2014-07-25 01:00:15 +0200
committerMichal Simek <michal.simek@xilinx.com>2014-07-25 09:45:51 +0200
commitfbb4add88c7d1240c75129c1442ec8dbed3182ae (patch)
tree20f586860cdf80e248032e73eee9238b4532c674 /arch/arm/boot/dts/zynq-7000.dtsi
parent6726e3edf88337e30d3cbeaecce75919b4bf8f92 (diff)
ARM: dts: zynq: Add DMAC for Parallella
Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/boot/dts/zynq-7000.dtsi')
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 366ca6434f5..cf0f3e4057c 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -204,6 +204,22 @@
};
};
+ dmac_s: dmac@f8003000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0xf8003000 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <0 13 4>,
+ <0 14 4>, <0 15 4>,
+ <0 16 4>, <0 17 4>,
+ <0 40 4>, <0 41 4>,
+ <0 42 4>, <0 43 4>;
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <4>;
+ clocks = <&clkc 27>;
+ clock-names = "apb_pclk";
+ };
+
devcfg: devcfg@f8007000 {
compatible = "xlnx,zynq-devcfg-1.0";
reg = <0xf8007000 0x100>;