diff options
author | Rahul Sharma <rahul.sharma@samsung.com> | 2014-05-16 05:22:41 +0900 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-05-19 22:54:48 +0900 |
commit | 2e747d63a796f4de9b9cd3ea1076fda47d83f8df (patch) | |
tree | d2bbea7a5bd5b2f52d0ba63c84fc76809c893b58 /arch/arm/boot/dts | |
parent | b16be76f926ff177cb9884be4cd62580c820420b (diff) |
ARM: dts: enable hdmi for exynos5250 based snow board
Enable support for HDMI for exynos5250 based Snow board.
Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/exynos5250-cros-common.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5250-snow.dts | 14 |
2 files changed, 19 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/exynos5250-cros-common.dtsi b/arch/arm/boot/dts/exynos5250-cros-common.dtsi index 2c1560d52f1..89ac90f59e2 100644 --- a/arch/arm/boot/dts/exynos5250-cros-common.dtsi +++ b/arch/arm/boot/dts/exynos5250-cros-common.dtsi @@ -240,7 +240,7 @@ samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <378000>; - hdmiphy@38 { + hdmiphy: hdmiphy@38 { compatible = "samsung,exynos4212-hdmiphy"; reg = <0x38>; }; @@ -304,6 +304,10 @@ hdmi { hpd-gpio = <&gpx3 7 0>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + phy = <&hdmiphy>; + ddc = <&i2c_2>; }; gpio-keys { diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index a38fd1853f3..c43cd3de75b 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -51,6 +51,13 @@ samsung,pin-pud = <0>; samsung,pin-drv = <0>; }; + + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; }; pinctrl@13400000 { @@ -324,4 +331,11 @@ clock-frequency = <24000000>; }; }; + + hdmi { + hdmi-en-supply = <&tps65090_fet7>; + vdd-supply = <&ldo8_reg>; + vdd_osc-supply = <&ldo10_reg>; + vdd_pll-supply = <&ldo8_reg>; + }; }; |