diff options
| author | Dirk Behme <dirk.behme@de.bosch.com> | 2013-02-15 15:10:01 +0100 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-09 22:52:49 +0800 |
| commit | 218abe6fe31b2059a6a647eddbe9c3ee08fa26fd (patch) | |
| tree | 8494e5fbffa9862288763ffca95f0d161b075f85 /arch/arm/boot/dts | |
| parent | 8b9ad9f67d094efd2c2765d82cc1866bee9052c2 (diff) | |
ARM: dts: imx6q: add PMU
Add ARM Cortex A9 Performance Monitor Unit (PMU) support.
On i.MX6 a combined interrupt on hardware line #126 is used
(i.MX6 TRM: Performance Unit interrupt).
For more details see Documentation/devicetree/bindings/arm/pmu.txt
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 06ec460b458..8f34a3cd274 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -101,6 +101,11 @@ cache-level = <2>; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <0 94 0x04>; + }; + aips-bus@02000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; |