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authorThierry Reding <treding@nvidia.com>2014-02-28 17:40:24 +0100
committerStephen Warren <swarren@nvidia.com>2014-02-28 10:23:45 -0700
commit40e231c770a4201febdf64f677862c9910e81946 (patch)
treed1faf1910c6dc095e2cfc16f2a7f5e325bf40fff /arch/arm/boot/dts
parentd72be031b3ceeae5a4761e400af1ac60ca313449 (diff)
ARM: tegra: Enable eDP for Venice2
Venice2 has a 12.9" (2560x1700) panel connected to the eDP output of the Tegra124. The panel has an EDID to describe the video timings but needs a few extra nodes to get the backlight to come up. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/tegra124-venice2.dts32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index b0db6348827..7ffef561d66 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -16,6 +16,20 @@
reg = <0x80000000 0x80000000>;
};
+ host1x@50000000 {
+ sor@54540000 {
+ status = "okay";
+
+ nvidia,dpaux = <&dpaux>;
+ nvidia,panel = <&panel>;
+ };
+
+ dpaux: dpaux@545c0000 {
+ vdd-supply = <&vdd_3v3_panel>;
+ status = "okay";
+ };
+ };
+
pinmux: pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&pinmux_default>;
@@ -940,6 +954,17 @@
};
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+
+ enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+ power-supply = <&vdd_led>;
+ pwms = <&pwm 1 1000000>;
+
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+ };
+
clocks {
compatible = "simple-bus";
#address-cells = <1>;
@@ -965,6 +990,13 @@
};
};
+ panel: panel {
+ compatible = "lg,lp129qe", "simple-panel";
+
+ backlight = <&backlight>;
+ ddc-i2c-bus = <&dpaux>;
+ };
+
regulators {
compatible = "simple-bus";
#address-cells = <1>;