diff options
author | Olof Johansson <olof@lixom.net> | 2012-10-01 14:19:17 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2012-10-01 14:19:17 -0700 |
commit | 6d55d5968a8622f3ea20ec40737aea1cfba6438c (patch) | |
tree | 72481307c22f9b6170591cece793ea24f97a9ddb /arch/arm/boot/dts | |
parent | f7b967bffefe69f1ad8b79e263237ec1feba7b9b (diff) | |
parent | b6e3b5c2fea9c76617e101cbbc54ed14961f9dee (diff) |
Merge branch 'next/soc' into HEAD
Conflicts:
arch/arm/mach-ux500/clock.c
arch/arm/mach-ux500/cpu.c
drivers/clocksource/Makefile
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/bcm2835-rpi-b.dts | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/bcm2835.dtsi | 39 |
2 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts new file mode 100644 index 00000000000..7dd860f83f9 --- /dev/null +++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts @@ -0,0 +1,12 @@ +/dts-v1/; +/memreserve/ 0x0c000000 0x04000000; +/include/ "bcm2835.dtsi" + +/ { + compatible = "raspberrypi,model-b", "brcm,bcm2835"; + model = "Raspberry Pi Model B"; + + memory { + reg = <0 0x10000000>; + }; +}; diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi new file mode 100644 index 00000000000..0b619398532 --- /dev/null +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -0,0 +1,39 @@ +/include/ "skeleton.dtsi" + +/ { + compatible = "brcm,bcm2835"; + model = "BCM2835"; + interrupt-parent = <&intc>; + + chosen { + bootargs = "earlyprintk console=ttyAMA0"; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x7e000000 0x20000000 0x02000000>; + + timer { + compatible = "brcm,bcm2835-system-timer"; + reg = <0x7e003000 0x1000>; + interrupts = <1 0>, <1 1>, <1 2>, <1 3>; + clock-frequency = <1000000>; + }; + + intc: interrupt-controller { + compatible = "brcm,bcm2835-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + uart@20201000 { + compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; + reg = <0x7e201000 0x1000>; + interrupts = <2 25>; + clock-frequency = <3000000>; + }; + }; +}; |