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authorArnd Bergmann <arnd@arndb.de>2013-06-21 19:54:13 +0200
committerArnd Bergmann <arnd@arndb.de>2013-06-21 19:54:13 +0200
commitf7bea65be78ca165c6b44f28497ae6f5dfc7db26 (patch)
tree12f50b821bdb3c5ef0d469da1b1f10099137ce89 /arch/arm/boot
parent7aaa1e8c5efd01d9dc8e863c77902291247f88bb (diff)
parent01db527e657d6cf646c6e6f059ad41e7023a25e7 (diff)
Merge tag 'dt-3.11-6' of git://git.infradead.org/users/jcooper/linux into next/dt
From Jason Cooper: mvebu dt changes for v3.11 (round 6) - mvebu - mini-PCIe connectors on Armada 370 RD - kirkwood - correct internal register ranges translation * tag 'dt-3.11-6' of git://git.infradead.org/users/jcooper/linux: ARM: Kirkwood: Fix the internal register ranges translation arm: mvebu: enable mini-PCIe connectors on Armada 370 RD Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/armada-370-rd.dts16
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi5
2 files changed, 19 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index 89c21106cfa..a3a2fedb872 100644
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -85,6 +85,22 @@
gpios = <&gpio0 6 1>;
};
};
+
+ pcie-controller {
+ status = "okay";
+
+ /* Internal mini-PCIe connector */
+ pcie@1,0 {
+ /* Port 0, Lane 0 */
+ status = "okay";
+ };
+
+ /* Internal mini-PCIe connector */
+ pcie@2,0 {
+ /* Port 1, Lane 0 */
+ status = "okay";
+ };
+ };
};
};
};
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 5d7b759f06a..1ae3eb2dea2 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -30,7 +30,8 @@
ocp@f1000000 {
compatible = "simple-bus";
- ranges = <0x00000000 0xf1000000 0x4000000
+ ranges = <0x00000000 0xf1000000 0x0100000
+ 0xf4000000 0xf4000000 0x0000400
0xf5000000 0xf5000000 0x0000400>;
#address-cells = <1>;
#size-cells = <1>;
@@ -163,7 +164,7 @@
ale = <1>;
bank-width = <1>;
compatible = "marvell,orion-nand";
- reg = <0x3000000 0x400>;
+ reg = <0xf4000000 0x400>;
chip-delay = <25>;
/* set partition map and/or chip-delay in board dts */
clocks = <&gate_clk 7>;