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authorOlof Johansson <olof@lixom.net>2013-04-14 20:49:21 -0700
committerOlof Johansson <olof@lixom.net>2013-04-14 20:49:28 -0700
commitb56a7f9206efa2982140837e36aca88cfedd66bc (patch)
treea1270fbf47cbaf6e056b2a06ede71cd622df987a /arch/arm/boot
parent56c5c13f7080f9299a92b3fb6a1bf22689d607cc (diff)
parente25e3d1fef2c57e49aef64535341c15fe2b29b4a (diff)
Merge tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/soc
From David Brown: Patches for MSM core These patches are changes to the MSM timer code that will be for upcoming targets, including a generalization of the binding and preventing a missing timer interrupt. * tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm: ARM: msm: Wait for timer clear to complete ARM: msm: Rework timer binding to be more general Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/msm8660-surf.dts20
-rw-r--r--arch/arm/boot/dts/msm8960-cdp.dts22
2 files changed, 15 insertions, 27 deletions
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
index 31f2157cd7d..743ef42df23 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -16,19 +16,13 @@
};
timer@2000004 {
- compatible = "qcom,msm-gpt", "qcom,msm-timer";
- interrupts = <1 1 0x301>;
- reg = <0x02000004 0x10>;
- clock-frequency = <32768>;
- cpu-offset = <0x40000>;
- };
-
- timer@2000024 {
- compatible = "qcom,msm-dgt", "qcom,msm-timer";
- interrupts = <1 0 0x301>;
- reg = <0x02000024 0x10>,
- <0x02000034 0x4>;
- clock-frequency = <6750000>;
+ compatible = "qcom,scss-timer", "qcom,msm-timer";
+ interrupts = <1 0 0x301>,
+ <1 1 0x301>,
+ <1 2 0x301>;
+ reg = <0x02000000 0x100>;
+ clock-frequency = <27000000>,
+ <32768>;
cpu-offset = <0x40000>;
};
diff --git a/arch/arm/boot/dts/msm8960-cdp.dts b/arch/arm/boot/dts/msm8960-cdp.dts
index 9e621b5ad3d..3ae51fb02e1 100644
--- a/arch/arm/boot/dts/msm8960-cdp.dts
+++ b/arch/arm/boot/dts/msm8960-cdp.dts
@@ -15,20 +15,14 @@
< 0x02002000 0x1000 >;
};
- timer@200a004 {
- compatible = "qcom,msm-gpt", "qcom,msm-timer";
- interrupts = <1 2 0x301>;
- reg = <0x0200a004 0x10>;
- clock-frequency = <32768>;
- cpu-offset = <0x80000>;
- };
-
- timer@200a024 {
- compatible = "qcom,msm-dgt", "qcom,msm-timer";
- interrupts = <1 1 0x301>;
- reg = <0x0200a024 0x10>,
- <0x0200a034 0x4>;
- clock-frequency = <6750000>;
+ timer@200a000 {
+ compatible = "qcom,kpss-timer", "qcom,msm-timer";
+ interrupts = <1 1 0x301>,
+ <1 2 0x301>,
+ <1 3 0x301>;
+ reg = <0x0200a000 0x100>;
+ clock-frequency = <27000000>,
+ <32768>;
cpu-offset = <0x80000>;
};