diff options
author | Alexandre Pereira da Silva <aletes.xgr@gmail.com> | 2012-06-12 10:34:12 -0300 |
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committer | Roland Stigge <stigge@antcom.de> | 2012-06-14 16:16:19 +0200 |
commit | 2e0b5a375288d624feb16b58a3af662338a63641 (patch) | |
tree | 91dacd1d0576e89c19d5a60b562d28b2c06b4db8 /arch/arm/boot | |
parent | 1440837440a31672973eedaf632f54c9dfc08c4d (diff) |
ARM: LPC32xx: Add dt settings to the at25 node
Add the reg, cs-gpios and max-frequencies that are needed for spi
device registry in phy3250.
Adds also the pl022 internal transfers details via dt
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/phy3250.dts | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/phy3250.dts b/arch/arm/boot/dts/phy3250.dts index f3bf1493afb..802ec5b2fd0 100644 --- a/arch/arm/boot/dts/phy3250.dts +++ b/arch/arm/boot/dts/phy3250.dts @@ -133,8 +133,29 @@ }; ssp0: ssp@20084000 { + #address-cells = <1>; + #size-cells = <0>; + pl022,num-chipselects = <1>; + cs-gpios = <&gpio 3 5 0>; + eeprom: at25@0 { + pl022,hierarchy = <0>; + pl022,interface = <0>; + pl022,slave-tx-disable = <0>; + pl022,com-mode = <0>; + pl022,rx-level-trig = <1>; + pl022,tx-level-trig = <1>; + pl022,ctrl-len = <11>; + pl022,wait-state = <0>; + pl022,duplex = <0>; + + at25,byte-len = <0x8000>; + at25,addr-mode = <2>; + at25,page-size = <64>; + compatible = "atmel,at25"; + reg = <0>; + spi-max-frequency = <5000000>; }; }; |