diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-01-07 12:30:20 +0000 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-01-07 12:42:17 +0000 |
commit | 237c78beb8a988453bac1993d21f025d070a0d8d (patch) | |
tree | 9864f0924650770881141359a2d5bac623949789 /arch/arm/boot | |
parent | 4eb821999086417ab42a15174b51497122fc406e (diff) | |
parent | 7b9dd47136c07ffd883aff6926c7b281e4c1eea4 (diff) |
Merge branch 'depends/rmk/for-linus' into samsung/dt
Conflicts:
arch/arm/mach-exynos/Makefile
arch/arm/mach-exynos/cpu.c -> common.c
arch/arm/mach-exynos/include/mach/entry-macro.S
arch/arm/mach-exynos/init.c -> common.c
arch/arm/mach-s5p64x0/init.c -> common.c
arch/arm/mach-s5pv210/init.c -> common.c
Multiple files were moved into common.c files in the rmk/for-linus
branch, so this moves over the samsung/dt changes to the new
files.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/compressed/Makefile | 3 | ||||
-rw-r--r-- | arch/arm/boot/compressed/head.S | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 21f56ff3279..cf0a64ce4b8 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -126,7 +126,8 @@ ccflags-y := -fpic -fno-builtin -I$(obj) asflags-y := -Wa,-march=all # Supply kernel BSS size to the decompressor via a linker symbol. -KBSS_SZ = $(shell size $(obj)/../../../../vmlinux | awk 'END{print $$3}') +KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \ + awk 'END{print $$3}') LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ) # Supply ZRELADDR to the decompressor via a linker symbol. ifneq ($(CONFIG_AUTO_ZRELADDR),y) diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index c2effc91725..c5d60250d43 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -659,6 +659,7 @@ __armv7_mmu_cache_on: mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer mcrne p15, 0, r1, c3, c0, 0 @ load domain access control #endif + mcr p15, 0, r0, c7, c5, 4 @ ISB mcr p15, 0, r0, c1, c0, 0 @ load control register mrc p15, 0, r0, c1, c0, 0 @ and read it back mov r0, #0 |