diff options
| author | Venu Byravarasu <vbyravarasu@nvidia.com> | 2013-05-16 19:42:56 +0530 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-05-17 16:22:05 -0600 |
| commit | 9dffe3be3f321581c4510f2fa2e217b18c703bcd (patch) | |
| tree | 671d71489dad5f1d1868f68a6eee654be4fa16d9 /arch/arm/boot | |
| parent | d400f209b4afe4a196baac276128eccac6a11b31 (diff) | |
ARM: tegra: modify ULPI reset GPIO properties
1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active
low nature of the GPIO.
2. Placed USB PHY DT node immediately below the EHCI controller DT nodes
and corrected reg value in the name of USB PHY DT node.
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-colibri-512.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/tegra20-harmony.dts | 10 | ||||
| -rw-r--r-- | arch/arm/boot/dts/tegra20-paz00.dts | 10 | ||||
| -rw-r--r-- | arch/arm/boot/dts/tegra20-seaboard.dts | 10 | ||||
| -rw-r--r-- | arch/arm/boot/dts/tegra20-trimslice.dts | 10 | ||||
| -rw-r--r-- | arch/arm/boot/dts/tegra20-ventana.dts | 10 |
6 files changed, 30 insertions, 26 deletions
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi index a573b94b7c9..c12af78e479 100644 --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi @@ -449,7 +449,11 @@ usb@c5004000 { status = "okay"; - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */ + }; + + usb-phy@c5004000 { + nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */ }; sdhci@c8000600 { diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index e7d5de4e00b..e84f3f6a539 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -430,15 +430,15 @@ usb@c5004000 { status = "okay"; - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */ }; - usb@c5008000 { - status = "okay"; + usb-phy@c5004000 { + nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */ }; - usb-phy@c5004400 { - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + usb@c5008000 { + status = "okay"; }; sdhci@c8000200 { diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index e3e0c9977df..e9ac2a99130 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -429,15 +429,15 @@ usb@c5004000 { status = "okay"; - nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ + nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */ }; - usb@c5008000 { - status = "okay"; + usb-phy@c5004000 { + nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */ }; - usb-phy@c5004400 { - nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ + usb@c5008000 { + status = "okay"; }; sdhci@c8000000 { diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index cee4c34010f..9dd4f8ee4f4 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -571,15 +571,15 @@ usb@c5004000 { status = "okay"; - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */ }; - usb@c5008000 { - status = "okay"; + usb-phy@c5004000 { + nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */ }; - usb-phy@c5004400 { - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + usb@c5008000 { + status = "okay"; }; sdhci@c8000000 { diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 9cc78a15d73..fd7afd6b830 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -316,15 +316,15 @@ usb@c5004000 { status = "okay"; - nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ + nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */ }; - usb@c5008000 { - status = "okay"; + usb-phy@c5004000 { + nvidia,phy-reset-gpio = <&gpio 168 1>; /* gpio PV0, active low */ }; - usb-phy@c5004400 { - nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ + usb@c5008000 { + status = "okay"; }; sdhci@c8000000 { diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index dd38f1f0383..a75a0e78523 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -507,15 +507,15 @@ usb@c5004000 { status = "okay"; - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */ }; - usb@c5008000 { - status = "okay"; + usb-phy@c5004000 { + nvidia,phy-reset-gpio = <&gpio 169 1>; /* gpio PV1, active low */ }; - usb-phy@c5004400 { - nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + usb@c5008000 { + status = "okay"; }; sdhci@c8000000 { |