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authorOlof Johansson <olof@lixom.net>2015-01-29 13:57:19 -0800
committerOlof Johansson <olof@lixom.net>2015-01-29 13:57:19 -0800
commit1215c3e65a50cc9770c8a6a1d6689fdcb673c4cc (patch)
treecb1d8e17e7e57d5f57125ef9ad6202853e221524 /arch/arm/boot
parenta35306d3ad45df81fedbe65a1cc8214b91d03aca (diff)
parentea08de16eb1ba2052ce2db4b58b62a2ec33357a3 (diff)
Merge tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung 3rd DT updates for v3.20" from Kukjin Kim: - add DISP1 power domain for support HDMI support on exynos5420/5422/5800 and the power domain node including FIMD1, MIXER and HDMI modules (tested on exynos5420 Peach Pit and exynos5800 Peach Pi Chromebooks and exynos5422 Odroid XU3 by Javier Martinez Canillas) Note this is including a patch for adding clock IDs for the DISP1 power domain with Mike and Sylwester's acks so that could be handled together to avoid non-working. * tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: Add DISP1 power domain for exynos5420 clk: exynos5420: Add IDs for clocks used in DISP1 power domain Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 03ef2481c64..a0a3b282920 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -274,6 +274,20 @@
#power-domain-cells = <0>;
};
+ disp_pd: power-domain@100440C0 {
+ compatible = "samsung,exynos4210-pd";
+ reg = <0x100440C0 0x20>;
+ #power-domain-cells = <0>;
+ clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK200>,
+ <&clock CLK_MOUT_USER_ACLK200_DISP1>,
+ <&clock CLK_MOUT_SW_ACLK300>,
+ <&clock CLK_MOUT_USER_ACLK300_DISP1>,
+ <&clock CLK_MOUT_SW_ACLK400>,
+ <&clock CLK_MOUT_USER_ACLK400_DISP1>;
+ clock-names = "oscclk", "pclk0", "clk0",
+ "pclk1", "clk1", "pclk2", "clk2";
+ };
+
pinctrl_0: pinctrl@13400000 {
compatible = "samsung,exynos5420-pinctrl";
reg = <0x13400000 0x1000>;
@@ -541,6 +555,7 @@
fimd: fimd@14400000 {
clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
clock-names = "sclk_fimd", "fimd";
+ power-domains = <&disp_pd>;
};
adc: adc@12D10000 {
@@ -714,6 +729,7 @@
phy = <&hdmiphy>;
samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
+ power-domains = <&disp_pd>;
};
hdmiphy: hdmiphy@145D0000 {
@@ -726,6 +742,7 @@
interrupts = <0 94 0>;
clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
clock-names = "mixer", "sclk_hdmi";
+ power-domains = <&disp_pd>;
};
gsc_0: video-scaler@13e00000 {