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authorSekhar Nori <nsekhar@ti.com>2010-07-20 16:46:51 +0530
committerKevin Hilman <khilman@deeprootsystems.com>2010-09-24 07:40:25 -0700
commitb987c4b2c9c9db2393f4c089e63d1734301214e5 (patch)
tree446b9ae602d8669e9e03107b976c9a88040b84ca /arch/arm/common/gic.c
parent30a2c5d2f0134df6175af26ce554aacaee304280 (diff)
davinci: am18x/da850/omap-l138: keep async clock constant with cpufreq
Keep PLL0 SYSCLK3 at a constant rate of 100MHz. This enables the AEMIF timing to remain valid even as the PLL0 output is changed by cpufreq driver to save power. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/common/gic.c')
0 files changed, 0 insertions, 0 deletions