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author | Suresh Siddha <suresh.b.siddha@intel.com> | 2008-10-07 14:04:28 -0700 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2008-10-07 14:36:08 -0700 |
commit | 04944b793e18ece23f63c0252646b310c1845940 (patch) | |
tree | c8a99e14a910aedcd7147d5ccf2e63be5b26ca0a /arch/arm/common/sharpsl_param.c | |
parent | f364eadab59b316ea0bd9f9bc01af0ad89065569 (diff) |
x86: xsave: set FP, SSE bits in the xsave header in the user sigcontext
If a processor implementation discern that a processor state component is in
its initialized state, it may modify the corresponding bit in the
xsave header.xstate_bv as '0'. State in the memory layout setup by 'xsave'
will be consistent with the bit values in the header.
During signal handling, legacy applications may change the FP/SSE bits
in the sigcontext memory layout without touching the FP/SSE header bits
in the xsave header. So always set FP/SSE bits in the xsave header
while saving the sigcontext state to the user space. During signal return,
this will enable the kernel to capture any changes to the FP/SSE bits by the
legacy applications which don't touch xsave headers.
xsave aware apps can change the xstate_bv in the xsave header aswell
as change any contents in the memory layout. xrestor as part of sigreturn
will capture all the changes.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/arm/common/sharpsl_param.c')
0 files changed, 0 insertions, 0 deletions