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authorNicolas Pitre <nicolas.pitre@linaro.org>2012-07-05 21:33:26 -0400
committerNicolas Pitre <nicolas.pitre@linaro.org>2013-07-30 09:02:16 -0400
commited96762e3241f57aa812977cf1920d3ee0363f4d (patch)
tree18849feb3008c15c4affc370119821a4b1c72458 /arch/arm/common
parent9797a0e95ead7bfe52260c369ee9fe6ba445afaf (diff)
ARM: bL_switcher: do not hardcode GIC IDs in the code
Currently, GIC IDs are hardcoded making the code dependent on the 4+4 b.L configuration. Let's allow for GIC IDs to be discovered upon switcher initialization to support other b.L configurations such as the 1+1 one, or 2+3 as on the VExpress TC2. Signed-off-by: Nicolas Pitre <nico@linaro.org>
Diffstat (limited to 'arch/arm/common')
-rw-r--r--arch/arm/common/bL_switcher.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/common/bL_switcher.c b/arch/arm/common/bL_switcher.c
index 50e95d894e3..1c2e5bcfb1f 100644
--- a/arch/arm/common/bL_switcher.c
+++ b/arch/arm/common/bL_switcher.c
@@ -110,6 +110,8 @@ static int bL_switchpoint(unsigned long _arg)
* Generic switcher interface
*/
+static unsigned int bL_gic_id[MAX_CPUS_PER_CLUSTER][MAX_NR_CLUSTERS];
+
/*
* bL_switch_to - Switch to a specific cluster for the current CPU
* @new_cluster_id: the ID of the cluster to switch to.
@@ -159,7 +161,7 @@ static int bL_switch_to(unsigned int new_cluster_id)
this_cpu = smp_processor_id();
/* redirect GIC's SGIs to our counterpart */
- gic_migrate_target(cpuid + ib_cluster*4);
+ gic_migrate_target(bL_gic_id[cpuid][ib_cluster]);
/*
* Raise a SGI on the inbound CPU to make sure it doesn't stall
@@ -332,6 +334,16 @@ static int __init bL_switcher_halve_cpus(void)
cluster = (cpu_logical_map(i) >> 8) & 0xff;
if (cpumask_test_cpu(cpu, &common_mask)) {
+ /* Let's take note of the GIC ID for this CPU */
+ int gic_id = gic_get_cpu_id(i);
+ if (gic_id < 0) {
+ pr_err("%s: bad GIC ID for CPU %d\n", __func__, i);
+ return -EINVAL;
+ }
+ bL_gic_id[cpu][cluster] = gic_id;
+ pr_info("GIC ID for CPU %u cluster %u is %u\n",
+ cpu, cluster, gic_id);
+
/*
* We keep only those logical CPUs which number
* is equal to their physical CPU number. This is