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authorPavel Machek <pavel@denx.de>2012-10-17 20:16:48 +0200
committerArnd Bergmann <arnd@arndb.de>2012-10-25 16:52:53 +0200
commitef3f94412a4d7e107392e7c7cfc3e2d0668aa1aa (patch)
treee9a3489d60e86ad8c902104ffa2697edf4738c90 /arch/arm/include/debug/picoxcell.S
parent5e3059b2cb6fb412415da08b213549a6aed65d36 (diff)
ARM: socfpga: Fix socfpga compilation with early_printk() enabled
This fixes early_printk() compilation for socfpga. (senduart/busyuart/waituart were missing). It does that by making Picochip code generic. Signed-off-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/include/debug/picoxcell.S')
-rw-r--r--arch/arm/include/debug/picoxcell.S18
1 files changed, 1 insertions, 17 deletions
diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S
index 7419deb1b94..bc1f07c49cd 100644
--- a/arch/arm/include/debug/picoxcell.S
+++ b/arch/arm/include/debug/picoxcell.S
@@ -5,10 +5,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
- * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
- * accesses to the 8250.
*/
-#include <linux/serial_reg.h>
#define UART_SHIFT 2
#define PICOXCELL_UART1_BASE 0x80230000
@@ -19,17 +16,4 @@
ldr \rp, =PICOXCELL_UART1_BASE
.endm
- .macro senduart,rd,rx
- str \rd, [\rx, #UART_TX << UART_SHIFT]
- .endm
-
- .macro busyuart,rd,rx
-1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
- and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
- teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
- bne 1002b
- .endm
-
- /* The UART's don't have any flow control IO's wired up. */
- .macro waituart,rd,rx
- .endm
+#include "8250_32.S"