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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-02-12 14:32:01 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-03-14 19:42:44 +0000
commit3f17522ce461a31e7ced6311b28fcf5b8a763316 (patch)
treef2fde33f7e2887ad99b7579c9c05a30a424a31f2 /arch/arm/kernel/perf_event.c
parent1027247f6eb727db6c600b9eb02796f0766ae704 (diff)
Video: ARM CLCD: Better fix for swapped IENB and CNTL registers
On PL111, as found on Realview and other platforms, these registers are always arranged as CNTL then IENB. On PL110, these registers are IENB then CNTL, except on Versatile platforms. Re-arrange the handling of these register swaps so that PL111 always gets it right without resorting to ifdefs, leaving the only case needing special handling being PL110 on Versatile. Fill out amba/clcd.h with the PL110/PL111 register definition differences in case someone tries to use the PL110 specific definitions on PL111. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/perf_event.c')
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