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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-04-23 15:28:34 +0800
committerArnd Bergmann <arnd@arndb.de>2011-07-28 15:07:28 +0000
commit21d08b9d5536ac418bbce4f419fe2b528b7ddf31 (patch)
treef1a1bbf5645d933799e31d93365458826dfadea6 /arch/arm/mach-at91/at91rm9200.c
parent02f8c6aee8df3cdc935e9bdd4f2d020306035dbe (diff)
at91: introduce commom AT91_BASE_SYS
On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/at91rm9200.c')
-rw-r--r--arch/arm/mach-at91/at91rm9200.c15
1 files changed, 8 insertions, 7 deletions
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 83a1a3fee55..489f4d90f27 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -20,16 +20,12 @@
#include <mach/at91_st.h>
#include <mach/cpu.h>
+#include "soc.h"
#include "generic.h"
#include "clock.h"
static struct map_desc at91rm9200_io_desc[] __initdata = {
{
- .virtual = AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_4K,
- .type = MT_DEVICE,
- }, {
.virtual = AT91_VA_BASE_EMAC,
.pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC),
.length = SZ_16K,
@@ -315,13 +311,13 @@ void __init at91rm9200_set_type(int type)
/* --------------------------------------------------------------------
* AT91RM9200 processor initialization
* -------------------------------------------------------------------- */
-void __init at91rm9200_map_io(void)
+static void __init at91rm9200_map_io(void)
{
/* Map peripherals */
iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
}
-void __init at91rm9200_initialize(unsigned long main_clock)
+static void __init at91rm9200_initialize(unsigned long main_clock)
{
at91_arch_reset = at91rm9200_reset;
at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
@@ -394,3 +390,8 @@ void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
/* Enable GPIO interrupts */
at91_gpio_irq_setup();
}
+
+struct at91_soc __initdata at91rm9200_soc = {
+ .map_io = at91rm9200_map_io,
+ .init = at91rm9200_initialize,
+};