diff options
author | Andrew Victor <linux@maxim.org.za> | 2008-04-02 21:58:00 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-04-04 09:52:25 +0100 |
commit | e5f40bfaf309ec4cc27b717d48fb0824313e5ef8 (patch) | |
tree | a35c3051d900708487b5f2ffc6c44304c6f0db61 /arch/arm/mach-at91/at91sam9261_devices.c | |
parent | 4fd9212cb9bad88ec7c8bf5313f53331905f957a (diff) |
[ARM] 4909/1: [AT91] Timer/Counter Block platform_devices
Register platform_devices for the Timer/Counter Block peripherals
found on the AT91RM9200, SAM9 & CAP9 processors.
Original patch from David Brownell.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9261_devices.c')
-rw-r--r-- | arch/arm/mach-at91/at91sam9261_devices.c | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 0bd0edf8fa3..03cd32482ea 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -548,6 +548,55 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} /* -------------------------------------------------------------------- + * Timer/Counter block + * -------------------------------------------------------------------- */ + +#ifdef CONFIG_ATMEL_TCLIB + +static struct resource tcb_resources[] = { + [0] = { + .start = AT91SAM9261_BASE_TCB0, + .end = AT91SAM9261_BASE_TCB0 + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9261_ID_TC0, + .end = AT91SAM9261_ID_TC0, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AT91SAM9261_ID_TC1, + .end = AT91SAM9261_ID_TC1, + .flags = IORESOURCE_IRQ, + }, + [3] = { + .start = AT91SAM9261_ID_TC2, + .end = AT91SAM9261_ID_TC2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at91sam9261_tcb_device = { + .name = "atmel_tcb", + .id = 0, + .resource = tcb_resources, + .num_resources = ARRAY_SIZE(tcb_resources), +}; + +static void __init at91_add_device_tc(void) +{ + /* this chip has a separate clock and irq for each TC channel */ + at91_clock_associate("tc0_clk", &at91sam9261_tcb_device.dev, "t0_clk"); + at91_clock_associate("tc1_clk", &at91sam9261_tcb_device.dev, "t1_clk"); + at91_clock_associate("tc2_clk", &at91sam9261_tcb_device.dev, "t2_clk"); + platform_device_register(&at91sam9261_tcb_device); +} +#else +static void __init at91_add_device_tc(void) { } +#endif + + +/* -------------------------------------------------------------------- * RTT * -------------------------------------------------------------------- */ @@ -1050,6 +1099,7 @@ static int __init at91_add_standard_devices(void) { at91_add_device_rtt(); at91_add_device_watchdog(); + at91_add_device_tc(); return 0; } |