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authorNicolas Ferre <nicolas.ferre@atmel.com>2011-07-01 12:25:24 +0200
committerArnd Bergmann <arnd@arndb.de>2011-07-04 23:22:25 +0200
commit64393b3ae4e3cc86e2d622f682d736ec973364b6 (patch)
treec00b503c0c33dcfaa4ec2fab73608c3db9053d6c /arch/arm/mach-at91/board-cap9adk.c
parentc5efefac659870744f6e203e28abd095ac0f590b (diff)
AT91: Change nand buswidth logic to match hardware default configuration
The recently modified nand buswitth configuration is not aligned with board reality: the double footprint on boards is always populated with 8bits buswidth nand flashes. So we have to consider that without particular configuration the 8bits buswidth is selected by default. Moreover, the previous logic was always using !board_have_nand_8bit(), we change it to a simpler: board_have_nand_16bit(). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Tested-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-at91/board-cap9adk.c')
-rw-r--r--arch/arm/mach-at91/board-cap9adk.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c
index 1904fdf8761..cdb65d48325 100644
--- a/arch/arm/mach-at91/board-cap9adk.c
+++ b/arch/arm/mach-at91/board-cap9adk.c
@@ -215,7 +215,7 @@ static void __init cap9adk_add_device_nand(void)
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
- cap9adk_nand_data.bus_width_16 = !board_have_nand_8bit();
+ cap9adk_nand_data.bus_width_16 = board_have_nand_16bit();
/* setup bus-width (8 or 16) */
if (cap9adk_nand_data.bus_width_16)
cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;